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Building a stronger European semiconductor ecosystem with the European Network of Chips Competence Centers

About aCCCess

aCCCess (Alliance of Chips Competence Centres for Enhanced Semiconductor Services) is a four-year Coordination and Support Action launched in March 2025 under the EU Chips Act. It aims to build a strong, interconnected European Network of Chips Competence Centres (ENCCC) that enables innovation, facilitates access to advanced semiconductor services, and strengthens Europe’s position in the global semiconductor value chain.

Blumorpho
CZECH NATIONAL SEMICONDUCTOR CLUSTER, z.s.
MESAP (CENTRO SERVIZI INDUSTRIE SRL)
Minalogic
SILICON ALPS CLUSTER GMBH
SILICON SAXONY
VDI/VDE INNOVATION + TECHNIK GMBH

Network

Our network is comprised of Chip Competence Centers, Pilot lines and Design Platforms. Together, PLs and the DP empower the CCCs with cutting-edge infrastructure.

What is a Competence Center?

A Chips Competence Centre (CCC)is a hub of excellence providing access to specialised semiconductor knowledge, training, prototyping, testing, and small-scale production. These centres are pivotal to Europe's semiconductor strategy by:

  • Supporting SMEs and start-ups with innovation services
  • Bridging the gap between research and industry
  • Promoting regional and pan-European know-how in chips and microelectronics

What is a Pilot Line & a Design Platform?

Pilot Lines (PLs) are advanced manufacturing facilities that help scale innovations from research to production, enabling validation in relevant environments.

The Design Platform (DP) is a cloud-based virtual environment providing state-of-the-art Electronic Design Automation (EDA) tools and design libraries to:

  • Accelerate chip design and prototyping
  • Enable collaboration across Europe
  • Support education and skills development in semiconductor design

Events

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Advanced PDK workshop

May 27, 2026 09:00 CETMay 27, 2026 18:00 CET

imec LeuvenImec 1, Kapeldreef 75, Leuven, Belgium

Training information Join us for a fullday workshop exploring NanoICs newest finepitch redistribution layer (RDL) and dietowafer (D2W) hybridbonding process design kits (PDKs), the first openaccess interconnect PDKs enabling highdensity, energyefficient chiptochip integration. During this handson training, youll discover how these advanced packaging technologies unlock new capabilities for advanced system integration. ...

Event hosted byNanoIC

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European Semiconductor Collaborations Days

Jun 04, 2026 09:00 CETJun 05, 2026 15:00 CET

Novotel Budapest DanubeBudapest, Bem rakpart 33-34, 1027

Chips Without Borders will bring together key stakeholders from across the European semiconductor ecosystem, including industry leaders, SMEs, research organizations, and policy representatives. The program is designed to foster collaboration, showcase innovation, and strengthen international partnerships. Hungarian SMEs, industrial stakeholders, and the HCHiP consortium itself will present their profiles, ideas, and international collaboration...

Event hosted byHCHiP Hungarian Chip Competence Centre

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3rd APECS Roadshow: Norway

Jun 04, 2026 14:00 CETJun 04, 2026 15:00 CET

Oslo Science CityGaustadalleen 21, 0349 Oslo, Norway

**The Sensor Decade 2026** brings together leading voices from academia, industry and policy to explore the future of sensing technologies and their role in addressing global challenges across climate, health, industry and digital transformation. As part of the program, APECS will contribute with a dedicated session: **APECS Session** 4 June 2026 | 14:00 The...

Event hosted by CC NorChip

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aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.

Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.