Building a stronger European semiconductor ecosystem with the European Network of Chips Competence Centers
About aCCCess
aCCCess (Alliance of Chips Competence Centres for Enhanced Semiconductor Services) is a four-year Coordination and Support Action launched in March 2025 under the EU Chips Act. It aims to build a strong, interconnected European Network of Chips Competence Centres (ENCCC) that enables innovation, facilitates access to advanced semiconductor services, and strengthens Europe’s position in the global semiconductor value chain.
Network
Our network is comprised of Chip Competence Centers, Pilot lines and Design Platforms. Together, PLs and the DP empower the CCCs with cutting-edge infrastructure.
What is a Competence Center?
A Chips Competence Centre (CCC)is a hub of excellence providing access to specialised semiconductor knowledge, training, prototyping, testing, and small-scale production. These centres are pivotal to Europe's semiconductor strategy by:
- Supporting SMEs and start-ups with innovation services
- Bridging the gap between research and industry
- Promoting regional and pan-European know-how in chips and microelectronics
What is a Pilot Line & a Design Platform?
Pilot Lines (PLs) are advanced manufacturing facilities that help scale innovations from research to production, enabling validation in relevant environments.
The Design Platform (DP) is a cloud-based virtual environment providing state-of-the-art Electronic Design Automation (EDA) tools and design libraries to:
- Accelerate chip design and prototyping
- Enable collaboration across Europe
- Support education and skills development in semiconductor design
Latest News
Chips from the North: Connecting Design and Manufacturing in Europe
On 23-24 March, the Chips from the North event in Helsinki, organised by FiCCC, brought together Europe's semiconductor community to explore available support for companies across the value chain....
ENCCC Annual Meeting: Strengthening Europes Semiconductor Network
First Annual Meeting of CCCs was held on 5-6 February in Brussels...
PIXSpain Competence Centre Webpage Content Available
We are pleased to announce that the PIXSpain Competence Centre webpage is now fully available, providing a comprehensive overview of our role, activities, and ecosystem engagement within the photonics ecosystem....
Open Calls
CHIPS JU ECS Calls
Closes:May 07, 2026 17:00 CET
The Chips JU has two open calls for proposals under its Electronic Components & Systems (ECS) programme, funded through Horizon Europe. Deadline for project outline is 7 May 2026!
Chips Venture Forum 2026
Opens:Mar 17, 2026 09:00 CET
Closes:May 12, 2026 18:00 CET
The 2026 edition of the Chips Venture Forum will introduce an enhanced format designed to maximize interactions with investors and increase visibility across the semiconductor ecosystem.
APECS Open Access Call
Opens:Apr 01, 2026 00:00 CET
Closes:Jun 30, 2026 23:59 CET
The APECS Pilot Line launches it's first annual Open Access Calls!
As part of the APECS pilot lines broader access strategy, the annual Open Access Calls invite players across the semiconductor value chain to submit project ideas for selected pilot line technologies. The calls provide structured, guided, and transparent access to APECS modern R&D infrastructure, enabling companies, RTOs and universities to validate concepts, accelerate development, and collaborate directly with APECS experts.
Events
Webinar | Austrias Semiconductor Ecosystem and Opportunities around EBSCON 2026
Apr 08, 2026 14:00 CETApr 08, 2026 15:30 CET
Online
The online webinar will take place on 8 April from 14:00 15:30. During the webinar, we will also inform you about the upcoming trade mission to EBSCON in October 2026. This mission offers participants the opportunity to exchange knowledge and best practices, visit leading companies and R&D facilities, and...
Event hosted by
EuroCDP Webinar on Venture Building programmes
Apr 08, 2026 15:00 CESTApr 08, 2026 16:00 CEST
Webinar
EuroCDP is launching its Venture Building Programmes, a dedicated acceleration and incubation track designed to help European fabless startups move faster, design smarter, and validate their first silicon with confidence. Participating companies gain structured access to IC design tools, and a network built to support the next generation of European semiconductor...
Event hosted by
INTERMAG 2026
Apr 13, 2026 10:00 CETApr 13, 2026 12:00 CET
The worlds largest conference on magnetism.NanoIC is proud to be present at INTERMAG 2026, the worlds largest conference on magnetism, taking place April 1317, 2026 in Manchester, UK. The event brings together 1,5002,000 attendees and covers the latest research across the broad spectrum of fundamental and applied magnetism. The program...
Latest Trends
Quix Quantum demoes below threshold error mitigation
QuiX Quantum, the Dutch provider of photonic quantum computing hardware, says it has demonstrated “below threshold” error mitigation for the first time on
Arago achieves milestone with first AI chip design
Arago has reached a significant milestone with the tape-out of its first AI chip. This development could considerably influence competition in the semiconductor market.
CEA and PSMC Integrate RISC-V and Silicon Photonics into 3D Stacking
CEA-Leti and CEA-List have established a strategic partnership with Powerchip Semiconductor Manufacturing Corporation (PSMC) to advance the development of next-generation artificial intelligence systems. This collaboration focuses on the technical integration of RISC-V processor architectures and microLED-based silicon photonics into PSMC's established 3D stacking and interposer platforms. The primary objective is to address the intensifying bottlenecks [...]The post CEA and PSMC Integrate RISC-V and Silicon Photonics into 3D Stacking appeared first on Embedded.
aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.