
aCCCess (Alliance of Chips Competence Centres for Enhanced Semiconductor Services) is a four-year Coordination and Support Action launched in March 2025 under the EU Chips Act. It aims to build a strong, interconnected European Network of Chips Competence Centres (ENCCC) that enables innovation, facilitates access to advanced semiconductor services, and strengthens Europe’s position in the global semiconductor value chain.





Our network is comprised of Chip Competence Centers, Pilot lines and Design Platforms. Together, PLs and the DP empower the CCCs with cutting-edge infrastructure.
A Chips Competence Centre (CCC)is a hub of excellence providing access to specialised semiconductor knowledge, training, prototyping, testing, and small-scale production. These centres are pivotal to Europe's semiconductor strategy by:
Pilot Lines (PLs) are advanced manufacturing facilities that help scale innovations from research to production, enabling validation in relevant environments.
The Design Platform (DP) is a cloud-based virtual environment providing state-of-the-art Electronic Design Automation (EDA) tools and design libraries to:

Watch the replay of the session featuring the FAMES Pilot Line, the EuroCDP and the French Chips Competence centre ASREERICS, with real use cases from Soitec & Nellow...

The chips competence centres from Portugal and Spain establish the Iberian Network of Chips Competence Centres. The agreement, signed during the EPoSS Annual Forum in Braga (Portugal), brings together POEMS, MicroNanoSpain, and PIXSpain to advance structured cooperation, ensure strategic alignment, and elevate the visibility of the Iberian semiconductor ecosystem within...

The Netherlands is known for one semiconductor success story, but it is home to many. A new factsheet from ChipNL CC, part of the European network of Chips Competence Centres, maps a complete ecosystem of 58,000 people and EUR 33.6 billion in value across the full value chain....

Opens:Mar 09, 2026 00:00 CET
Closes:Dec 31, 2026 23:59 CET
The FAMES Pilot Line accepts Spontaneous User Requests year-round, offering organisations rapid access to its advanced semiconductor technologies outside the annual Open-Access Calls. This pathway enables time-critical projects to move forward without waiting for the next call.

Opens:Jun 02, 2026 00:00 CET
Closes:Jan 21, 2027 17:00 CET
Xecs is an Eureka Cluster specifically designed to accelerate the pace of sustainable industrial innovation in the Electronics Components & Systems (ECS) community. Xecs intends to create an ambitious international collaboration programme. The resulting RD&I projects will generate high societal and economic impact for all those who participate in an Xecs project.
INFRACHIP is a European project under Horizon Europe Programme, offering distributed research infrastructure as a wider European research platform for the sustainable development of next-generation and future semiconductor chips.

Jul 17, 2026 11:00 CETJul 17, 2026 14:30 CET
Maastricht Exhibition & Conference Centre (MECC)Forum 100, 6229 GV Maastricht, the Netherlands
On 17 July 2026, ChipNL CC co-organises a free half-day workshop on the sidelines of the Optica ImageSense Congress in Maastricht. Hosted jointly with the Finnish (FiCCC) and Austrian (AT-C3) Chips Competence Centres as part of the Chips for Europe Initiative, the workshop connects startups, SMEs, large enterprises and research...
Event hosted by

Jul 17, 2026 11:00 CETJul 17, 2026 16:00 CET
Maastricht Exhibition & Conference Centre (MECC). Side event to the Optica ImageSense Congress 2026Forum 100, 6229 GV Maastricht, the Netherlands
On 17 July 2026, ChipNL CC co-organises a free half-day workshop on the sidelines of the Optica ImageSense Congress in Maastricht. Hosted jointly with the Finnish (ficcc.eu) and Austrian (atc3.at) Chips Competence Centres as part of the EU Chips for Europe Initiative, the workshop connects startups, SMEs, researchers and investors...
Event hosted by

Sep 07, 2026 10:00 CETSep 07, 2026 12:00 CET
Palma de MallorcaSpain
The premier European forum for sharing innovations in solid-state devices and circuitsESSERC provides an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. With the level of integration for system-on-chip design rapidly increasing, a deeper interaction among technologists, device experts, IC designers and...
Event hosted by

GlobalFoundries expands into silicon photonics, AI infrastructure & autos as revenues rise. Undervalued vs. peers with an $88 PT. Click for more on GFS stock.

EE Times examines the companies, institutes, and policy initiatives positioning Spain within Europe’s next wave of semiconductor innovation.

Pairing sensing leadership with a complete ASIL-D safety PMIC architecture, the single-chip A81415 redefines brake-by-wire design while eliminating up to...

aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.