Building a stronger European semiconductor ecosystem with the European Network of Chips Competence Centers
About aCCCess
aCCCess (Alliance of Chips Competence Centres for Enhanced Semiconductor Services) is a four-year Coordination and Support Action launched in March 2025 under the EU Chips Act. It aims to build a strong, interconnected European Network of Chips Competence Centres (ENCCC) that enables innovation, facilitates access to advanced semiconductor services, and strengthens Europe’s position in the global semiconductor value chain.
Network
Our network is comprised of Chip Competence Centers, Pilot lines and Design Platforms. Together, PLs and the DP empower the CCCs with cutting-edge infrastructure.
What is a Competence Center?
A Chips Competence Centre (CCC)is a hub of excellence providing access to specialised semiconductor knowledge, training, prototyping, testing, and small-scale production. These centres are pivotal to Europe's semiconductor strategy by:
- Supporting SMEs and start-ups with innovation services
- Bridging the gap between research and industry
- Promoting regional and pan-European know-how in chips and microelectronics
What is a Pilot Line & a Design Platform?
Pilot Lines (PLs) are advanced manufacturing facilities that help scale innovations from research to production, enabling validation in relevant environments.
The Design Platform (DP) is a cloud-based virtual environment providing state-of-the-art Electronic Design Automation (EDA) tools and design libraries to:
- Accelerate chip design and prototyping
- Enable collaboration across Europe
- Support education and skills development in semiconductor design
Latest News
Chips Think Tank Webinar-6
Exploring the Future of Investment in Deeptech & Photonics ...
Chips from the North: Connecting Design and Manufacturing in Europe
On 23-24 March, the Chips from the North event in Helsinki, organised by FiCCC, brought together Europe's semiconductor community to explore available support for companies across the value chain....
ENCCC Annual Meeting: Strengthening Europes Semiconductor Network
First Annual Meeting of CCCs was held on 5-6 February in Brussels...
Open Calls
APECS Open Access Call
Opens:Apr 01, 2026 00:00 CET
Closes:Jun 30, 2026 23:59 CET
The APECS Pilot Line launches it's first annual Open Access Calls!
As part of the APECS pilot lines broader access strategy, the annual Open Access Calls invite players across the semiconductor value chain to submit project ideas for selected pilot line technologies. The calls provide structured, guided, and transparent access to APECS modern R&D infrastructure, enabling companies, RTOs and universities to validate concepts, accelerate development, and collaborate directly with APECS experts.
Open Access to FAMES Pilot Line
Opens:Mar 09, 2026 00:00 CET
Closes:Dec 31, 2026 23:59 CET
The FAMES Pilot Line accepts Spontaneous User Requests year-round, offering organisations rapid access to its advanced semiconductor technologies outside the annual Open-Access Calls. This pathway enables time-critical projects to move forward without waiting for the next call.
INFRACHIP Open Call to Free Access to State-of-the-Art Technologies
INFRACHIP is a European project under Horizon Europe Programme, offering distributed research infrastructure as a wider European research platform for the sustainable development of next-generation and future semiconductor chips.
Events
Webinar | From Lab to Market: How APECS and ChipNL CC enable advanced packaging in Europe
May 12, 2026 10:00 CETMay 12, 2026 11:00 CET
Online
Advanced packaging and heterogeneous integration play an increasingly important role in the further development of the European semiconductor industry. They make it possible to bring different technologies, functions, and components closer together, thus forming an important link between research, application, and market introduction. On Tuesday, May 12, 2026, the webinar From...
Event hosted by
aCCCess Webinar on Technology Offers #1
May 12, 2026 10:00 CESTMay 12, 2026 11:00 CEST
Webinar
## The aCCCess Webinar Series on Technology Offers The webinar series will focus on technology offers of pilot lines, chips competence centres and beyond. On each webinar we will have one technology on spotlight and also focus on collaborations between ENCCC acteurs and user experiences. [Join us](https://events.teams.microsoft.com/event/1c57a35a-c5ea-41b9-a369-17adfd7cf6ef@2aebdaed-03ac-495c-b5c6-63033f7fd03d) for the first webinar...
Event hosted by
Riga Chip Summit 2026
May 13, 2026 08:30 EESTMay 13, 2026 17:00 EEST
Riga, Latvia at the VEF Kamerzale Spidola. Ieriku str. 5A, Riga, Latvia
**Riga Chip Summit 2026** is the first chip dedicated summit in Latvia organised by the Latvian Chip Competence Centre (LCCC). The summit will bring together stakeholders from industry, academia, finance, competence centres, start-ups, and SMEs from the NordicBaltic region and the wider European ecosystem. The event aims to explore opportunities,...
Event hosted by
Latest Trends
500 kW/l power density: New SiC inverter from Fraunhofer IZM
(Image: Fraunhofer IZM / Volker Mai) Fraunhofer IZM has developed an inverter for electric drives that processes 500 kilowatts of power in a volume of one liter – many times more than conventional alternatives. The inverter, developed for Mitsubishi Heavy Industries (MHI), achieves an efficiency of 99 percent.
Monolithic CMOS-MEMS Multi-Parameter Gas Detection SoC with Low Power and High Sensitivity
This work presents a monolithic CMOS-MEMS multi-parameter gas detection system-on-chip (SoC), integrating a metal-oxide gas sensor, a piezoresistive flow sensor, and signal conditioning circuit. The stacked integration architecture enables compact system design. The optimized fabrication process parameters, including the sputtering atmosphere for SnO2 sensing layer and implantation method for piezoresistors, further enhance sensitivity. The microbridge structure of the gas sensor, combined with the working principle of the piezoresistive flow sensor, enables low-power operation. Furthermore, an on-chip signal conditioning circuit is monolithically integrated to enhance signal quality. Experimental results show that the proposed SoC exhibits gas sensitivity (Ra/Rg) of 4.2 at 60 ppm H2 and flow sensitivity of 49 mV/(L/min) at 1.6 L/min with power consumption below 20 mW. These results highlight the potential of the proposed SoC as a high-sensitivity and low-power gas detection solution for hydrogen energy applications.
Xanadu and EV Group partner to advance photonic quantum chip manufacturing - New Electronics
Xanadu Quantum Technologies and semiconductor equipment supplier EV Group (EVG) have announced a strategic partnership.
aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.