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Pathfinding PDKs: The missing link between academia and industry in the race beyond 2nm semiconductor innovation

Pathfinding PDKs: The missing link between academia and industry in the race beyond 2nm semiconductor innovation

27.10.2025

Featured in the media

NanoIC’s pathfinding PDKs: accelerating design for future chips beyond 2nm technology.


Advances in AI and chip architectures are driving new demands in semiconductor design, making close collaboration between academia and industry essential.

However, as we move to advanced semiconductor technology nodes, academic research has gradually drifted away from industrial practice, limiting academic researchers in driving innovation.

NanoIC aims to bridge this gap, providing pathfinding PDKs, predictive, early-access design environments, enabling researchers to simulate and optimize future chip architectures.

By restoring the link between academic innovation and industrial practice, pathfinding PDKs accelerate disruptive ideas and help build a resilient, next-generation semiconductor ecosystem.


NanoIC: A key player in solving Europe’s semiconductor talent shortage

NanoIC: A key player in solving Europe’s semiconductor talent shortage

10.09.2025

Featured in the media

Backside power delivery networks to support advanced logic technology nodes

Backside power delivery networks to support advanced logic technology nodes

27.08.2025

Research update

Chips Venture Forum

Chips Venture Forum

17.07.2025

Are you building the future of semiconductors, AI-powered systems, advanced materials, or edge computing? Benefit from the strengths of Competence Centres across Europe by joining a vibrant ecosystem of innovators and key stakeholders. This is your chance to accelerate your ideas and connect with experts in the semiconductor value chain.

Greek chips at the heart of innovation

Greek chips at the heart of innovation

16.07.2025

Launched on 1 June 2025, the Hellenic Chips Competence Centre (HCCC) is Greece’s first semiconductor hub, established through a partnership between HETiA, the Ministry of Development, and the European Chips Joint Undertaking. With €7 million in funding, HCCC aims to strengthen Europe’s technological autonomy by supporting innovation, research, start-ups, and training in chip design and testing. As part of the EU’s “Chips for Europe” initiative, HCCC connects Greek academic and industrial sectors, focusing on specialized applications. It positions Greece as a digital technology hub in Southeastern Europe. HCCC’s initial actions will be presented at the HETiA Forum in December 2025.

Enhancing chip performance

Enhancing chip performance

16.07.2025

The European semiconductor sector is experiencing significant growth, fueled by increasing investments in research and development. Companies are focusing on enhancing chip performance and energy efficiency to meet the needs of various industries.

NanoIC pilot line: Europe’s strategic leap in semiconductor innovation

NanoIC pilot line: Europe’s strategic leap in semiconductor innovation

30.06.2025

The German electronics magazine Markt&Technik has published a detailed feature on the NanoIC pilot line, recognizing it as a cornerstone of Europes semiconductor strategy under the EU Chips Act.

The article follows the NanoIC workshop held at ITF World 2025 in Antwerp, where the projects vision and technological roadmap were presented to a broad audience of industry leaders and policymakers.

Towards robust source/drain modules for advanced logic devices

Towards robust source/drain modules for advanced logic devices

19.06.2025

Paper in the spotlight

Outer wall forksheet bridges nanosheet and CFET architectures

Outer wall forksheet bridges nanosheet and CFET architectures

12.06.2025

Research update

Watch the presentations of the NanoIC pilot line workshop at ITF World 2025

Watch the presentations of the NanoIC pilot line workshop at ITF World 2025

10.06.2025

Click to watch

This was the NanoIC pilot line workshop

This was the NanoIC pilot line workshop

10.06.2025

Watch the after movie of this memorable afternoon track on the second day of ITF World 2025.

Results from the NanoIC pilot line at the 2025 VLSI Conference

Results from the NanoIC pilot line at the 2025 VLSI Conference

02.06.2025

Research update

AI’s future hinges on hardware innovation: A vision statement from imec CEO Luc Van den hove

AI’s future hinges on hardware innovation: A vision statement from imec CEO Luc Van den hove

22.05.2025

Vision

Capacitor-less IGZO DRAM: a promising technology for 3D DRAM and eDRAM

Capacitor-less IGZO DRAM: a promising technology for 3D DRAM and eDRAM

25.03.2025

Technology review

Imec CEO Luc Van den hove looks towards 2025

Imec CEO Luc Van den hove looks towards 2025

20.01.2025

Vision

NanoIC featured in SEMI: the imec-led initiative boosting Europe's semiconductor ecosystem

NanoIC featured in SEMI: the imec-led initiative boosting Europe's semiconductor ecosystem

05.12.2024

Interview with Srikanth Samavedam and Jo De Boeck

Take a look inside imec’s N2 P-PDK workshop

Take a look inside imec’s N2 P-PDK workshop

28.06.2024

Blog

Unlocking the future of compute systems with the NanoIC pilot line

Unlocking the future of compute systems with the NanoIC pilot line

14.06.2024

Vision

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aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.

Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.