Digital VLSI Design Backend Hands-on Training Course
Intensive hands-on training in physical IC design, including floorplanning, placement, routing, clock-tree synthesis, and physical verification using industry EDA tools.
Level
Intermediate
Delivery Mode
In person
Language
Portuguese
Dates
1 Feb 2027 – 27 Feb 2027
Learning hours
0
ECTS
0.00
ECVET
0.00
Seats
Limited (5)
Location
https://www.poemscentre.eu/en/learning-portal
Fees
no fees
Delivered by
University of Porto
Chips Competence Centre
POEMS
Certification Type
EU-ECTS Credits
Target Audience
Recent graduates
Pre-requisites
Knowledge of circuit design
Categories
IC Design
Registration Contact
Register Now
aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.