NanoIC
The NanoIC pilot line, hosted by imec, is set to provide Europe with a leading-edge beyond 2nm System-on-Chip (SoC) pilot line for advanced logic, memory, and interconnect technologies.
The NanoIC Project competence center focuses on the advancement of nanotechnology and its applications in integrated circuits. It aims to foster collaboration among researchers, industry professionals, and academic institutions to drive innovation in nanofabrication, materials science, and electronic device development. The center provides a platform for knowledge exchange, offers resources for research and development, and promotes educational programs to enhance skills in nanotechnology. By leveraging cutting-edge research and fostering partnerships, the NanoIC Project seeks to position Europe as a leader in the global nanotechnology landscape and contribute to sustainable technological advancements.
Access to Design Exploration
Provides early access to advanced design tools and pathfinding PDKs—such as the N2 node PDK launched in 2024—enabling virtual prototyping and system-level optimization for beyond-2nm technologies. Integrated with mainstream EDA tools to accelerate innovation for industry and academia.
Education and Workforce Development
Offers expert courses on beyond-2nm semiconductor technologies, affordable design tools and prototyping services for universities, as well as internships, PhD programs, and additional training initiatives to strengthen Europe's semiconductor talent pipeline.
Access to R&D
Enables early-stage research and development for OEMs, IDMs, foundries, SMEs, research centers, and academia. Supports open, pre-competitive collaboration and provides access to advanced tools for metrology, inspection, and fabrication.
Access to Prototyping
Supports start-ups and scale-ups in prototyping devices and systems using beyond-2nm technologies. Includes wafer post-processing for integrating NanoIC modules with commercial chips, and prototyping support for 3D interconnects, silicon photonics, and advanced memory technologies.
Training Programs
Delivers training aligned with the EU Chips Act, with expert-level courses on next-generation semiconductor technologies, hands-on design enablement, and workforce development initiatives for students, engineers, and researchers.
Advanced Logic Technologies
Development of next-generation logic technologies including gate-all-around nanosheet transistors beyond the 2nm (N2) node, a CFET baseline flow targeting the A7 logic node, and enablement of high-NA extreme ultraviolet (EUV) lithography.
Advanced Memory Technologies
Advances memory solutions critical for future AI-driven applications, including spin-orbit torque MRAM (SOT-MRAM), BEOL-compatible embedded DRAM (eDRAM), and a scalable 3D memory platform.
Advanced Interconnect Technologies
Development of next-generation interconnects such as 3D electrical interconnects for scaled-pitch die-to-wafer hybrid bonding, high-density RDL technologies, and optical interconnects including silicon photonics interposers and GaAs quantum dot chiplets.
Design Enablement & PDKs
Provides pathfinding and system-level PDKs for early exploration of beyond-2nm technologies, enabling designers to simulate, optimize, and validate advanced SoC architectures.
Ecosystem & Infrastructure
Built upon imec’s 300 mm R&D cleanroom ecosystem, connecting European research centers, industry partners, SMEs, and suppliers to accelerate innovation and strengthen Europe’s semiconductor capabilities.
aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.