/Advanced PDK workshop

Advanced PDK workshop

Advanced PDK workshop

EVENT DETAILS

  • May 27, 2026 09:00 CETMay 27, 2026 18:00 CET
  • imec LeuvenImec 1, Kapeldreef 75, Leuven, Belgium
  • Event hosted byNanoIC

EVENT DETAILS

Training information

Join us for a fullday workshop exploring NanoICs newest finepitch redistribution layer (RDL) and dietowafer (D2W) hybridbonding process design kits (PDKs), the first openaccess interconnect PDKs enabling highdensity, energyefficient chiptochip integration.

During this handson training, youll discover how these advanced packaging technologies unlock new capabilities for advanced system integration.

The program combines accessible introductory lectures with practical design exercises that guide you through the capabilities of the new RDL and D2W PDKs.

Extra bonus: This event directly follows NanoICs Advanced IGZObased eDRAM PDK training (https://www.nanoic-project.eu/en/events/advanced-pdk-workshop-nanoics-igzo-based-edram-pdk) on May 26th, 2026. We highly recommend combining both sessions.

Why join?

  • Be among the first to work with NanoICs new interconnect PDKs (RDL & D2W).
  • Learn how finepitch polymerbased RDL, with line widths and spacings down to 1.3 microns and microbump pitches as tight as 20 microns, can help improve communication speed and reducing energy per bit.
  • Gain practical experience with design rule checks, routing, layout flows, and systemlevel considerations.
  • Engage with imec experts developing the underlying technology and get answers to your technical questions.

Tentative agenda

  • Introduction to the NanoIC project
  • Technical introduction of the NanoIC fine-pitch redistribution layer (RDL) PDK and on the NanoIC die-to-wafer (D2W) hybrid bonding PDK
  • Hands-on session with the NanoIC fine-pitch redistribution layer (RDL) PDK
  • Hands-on session with the NanoIC die-to-wafer (D2W) hybrid bonding PDK

The hands-on sessions will cover

  • Floorplanning of the 2.5D system
  • Importing the floorplan into the design environment
  • Routing of die-to-die signals
  • Power grid design and optimization
  • Routing die-to-PCB signals
  • Design Rule Check (DRC)
  • Layout Versus Schematic (LVS) checks of a chiplet package

Who should attend?

Designers, researchers, engineers, system architects, students (3rd year BSc, MSc, PhD), ... from academia and industry who want to explore advanced packaging, interconnect technologies and highperformance computing.

Attendance fee 100 EUR

Date May 27, 9 am - 6 pm

Venue Imec 1, Kapeldreef 75, Leuven, Belgium

Registration

  • Europractice member can register via the Europractice website.
  • Non-Europractice members can register via imec.academy.
  • Imec employees can register through the internal portal of imec.academy.

Registration will close on 11 May 2026, or earlier if all available places are filled.

Note: Before attending this course: All participants should have the imec Die-to-Wafer Hybrid Bonding DKLA (https://europractice-ic.com/wp-content/uploads/2026/03/20260226_DKLA_D2W_February2026.docx), and the imec Fine Pitch RDL DKLA (https://europractice-ic.com/wp-content/uploads/2026/03/20260227_DKLA_RDL_February2026.docx) signed by their hiring institutions. Please contact our support team at imecpdk@imec.be and mpc@imec.be with the mention that you would like access to the imec RDL PDK and the imec D2W PDK for training purposes. Our team will guide you through the procedure. Depending on the country of the requesting institution, the access procedure may take longer. Please contact the aforementioned email accounts for further information.

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aCCCess has received funding from the European Union’s Digital Europe Chips JU under Grant Agreement No 101217840.

Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or [name of the granting authority]. Neither the European Union nor the granting authority can be held responsible for them.